Hsin-Chou Chi

Associate Professor
Department of Computer Science & Information Engineering
National Dong Hwa University
Shoufeng, Hualien
TAIWAN

Email: hcchi@mail.ndhu.edu.tw
Phone: +886-3-8632701
Fax: +886-3-8632700

Personal Information

I received my BS and MS in Electrical Engineering from National Taiwan University, and my PhD in Computer Science from UCLA. I am currently a faculty member of Department of Computer Science & Information Engineering and Director of Information and Network Center, National Dong Hwa University. My research interests include computer architecture, parallel processing, and VLSI systems. The current focus is in the areas of system-on-chip design, embedded systems, and multiprocessor networks.

Teaching

Recent Publications

  • Chia-Ming Wu, Hsin-Chou Chi, and Ruay-Shiung Chang, "Mapping and Scheduling for Circuit-Switched Network-on-Chip Architecture," ETRI Journal, April 2009.
  • Hsin-Chou Chi, His-Che Tseng, and Chih-Ling Yang, "Efficient Diagnosis of Scan Chains with Single Stuck-at Faults," International Conference of Computing, Fullerton, April 2009.
  • Hsin-Chou Chi, Chia-Ming Wu, and Jun-Hui Lee, "Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures," IEEE International Symposium on Electronic Design, Test and Applications, Hong Kong, Jan. 2008.
  • Hsin-Chou Chi, Chia-Ming Wu, and Kuo-Yao Fu, "A High-Performance Programmable Scheduling Engine for ATM Switches," Journal of Internet Technology, Oct. 2007.
  • Chia-Ming Wu, Hsin-Chou Chi, and Wen-Pin Hsu, "Design and Implementation of Fair Queueing Algorithms for Packet Switches," Journal of Internet Technology, July 2007.
  • Reen-Cheng Wang, Yao-Chung Chang, Ruay-Shiung Chang, and Hsin-Chou Chi, "Non-Specific Application Sharing in Access Grid," Proc. Taiwan Academic Network Conference (TANet), Hualien, Nov. 2006.
  • Hsin-Chou Chi and Chia-Ming Wu, "An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures," Proc. IFIP International Conference on Very Large Scale Integration, Nice, Oct. 2006.
  • Chia-Ming Wu, Hsin-Chou Chi, and Ying-Ming Huang, "A Wrapper for Low-Power Error-Correcting Data Delivery in On-Chip Networks," Proc. International Conference on Communications, Circuits and Systems, Guilin, June 2006.
  • Hsin-Chou Chi, Chia-Ming Wu, and Sung-Tze Wu, "A Switch Supporting Circuit and Packet Switching for On-Chip Networks," Proc. IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Prague, Apr. 2006.
  • Chi-Yuan Chang, Chung-Sheng Li, Wei-Ming Chen, Hsin-Chou Chi, "Design of the IPv4/IPv6 Application Level Gateway on a Server for Academic Information Systems," Journal of IPv6 Forum Taiwan, Feb. 2006.
  • Hsin-Chou Chi and Chia-Ming Wu, "Efficient Switches for Network-on-Chip Based Embedded Systems," Proc. IFIP International Conference on Embedded and Ubiquitous Computing, Nagasaki, Dec. 2005.
  • Reen-Cheng Wang, Chi-Yuan Chen, Hsin-Chou Chi, Han-Chieh Chao, and Ruay-Shiung Chang, "Experiences of Using Access Grid over IPv6 Network," Proc. 2nd Workshop on Grid Technologies and Applications (WoGTA), Hualien, Dec. 2005.
  • Chia-Ming Wu and Hsin-Chou Chi, "Design of a High-Performance Switch for Circuit-Switched On-Chip Networks," Proc. IEEE Asian Solid-State Circuits Conference, Hsinchu, Nov. 2005.
  • Chia-Ming Wu, Ming-Chao Lee, and Hsin-Chou Chi, "Mapping of IP Cores to Network-on-Chip Architectures Based on Traffic Loads," Proc. International Application-Specific Integrated Circuits Conference, Shanghai, Oct. 2005.
  • Chi-Yuan Chang, Chung-Sheng Li, Wei-Ming Chen, Hsin-Chou Chi, "Design of the IPv4/IPv6 Application Level Gateway on a Server for Academic Information Systems," Proc. Taiwan Academic Network Conference (TANet), Taitung, Oct. 2005.
  • Yu-Feng Lee, Bofan Liu, Ching-Nung Yang, and Hsin-Chou Chi, "Automatic IP Management," Proc. Taiwan Academic Network Conference (TANet), Taitung, Oct. 2005.
  • Chia-Ming Wu, Sung-Tze Wu, and Hsin-Chou Chi, "Design of a Versatile Hybrid Switch for On-Chip Networks," Proc. VLSI Design/CAD Symposium, Hualien, August 2005.
  • Hsin-Chou Chi and Yu-Seng Lin, "Design and Implementation of an IP Wrapper for an On-Chip Network," Proc. IEEE Asia-Pacific Conference on Circuits and Systems, Tainan, Taiwan, December 2004.
  • Hsin-Chou Chi and Wen-Jen Wu, "Shortcut Allocation for Tree-Based Routing in Irregular Interconnection Networks," Proc. 16th IASTED Parallel and Distributed Computing and Systems, Boston, MA, November 2004.
  • Han-Chieh Chao, Tin-Yu Wu, Hsin-Chou Chi, Yu-Feng Lee, Jin-Cheng Huang, Yin-Fu Lai, and Shih-Ching Hsu, "Performance Analysis of TWAREN IPv6 Networks," Proc. Taiwan Academic Network Conference (TANet), Taichung, Oct. 2004.
  • Ssu-Yuan Lin and Hsin-Chou Chi, "An On-Chip Network with Pipelined Routers for SoC Design," Proc. VLSI Design/CAD Symposium, Kenting, Taiwan, August 2004.
  • Hsin-Chou Chi and Jia-Hung Chen, "Design and Implementation of a Routing Switch for On-Chip Interconnection Networks," Proc. 4th IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, Fukuoka, Japan, August 2004.

 

hcchi@mail.ndhu.edu.tw